Uninitialized memory varying from read to read

I'm saying the the scenario you are describing, if I understand what you are saying, doesn't happen. The cache line will be brought in the the L1 as exclusive so there no other core would be trying to write to it. LOCK = MESI for the most part in the last decade. Atomics are atomic because of the MESI negotiations for them. The idea of asserting a control line doesn't happen (I've seen one comment about that happening in the lat few years and it dealt with a cache split unaligned access after the split buffers were all occupied).

And yes, everything gets MESI negotiated (everything that can be cached). Thats kind of why aligned access is atomic on Intel. Once cache is your source of truth (over main memory) and you have to keep it consistent everything atomic seems like a natural endpoint)