It's more like a question than a conclusion but thanks for link. So, it's not an addressing issue.
With that out of the way, I see the number of clock pulses in each capture is different.
- ESP32 has 9 before SDA goes high
- nRF has 8 before SDA goes high
My understanding is that after transmitting a byte of data, the master releases the SDA line (pushes it to the high state) which is pulled down (after one clock pulse) by the receiver to be counted as an ACK.
Why do they look different?