How to implement rust embedded hal for RISC-V RV32E

help
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I'm developing a custom RISC-V RV32E-based SoC and attempting to use embedded-hal for driver development.
My challenges include:

  • How to properly implement MMIO register mapping?
  • How to choose a target ISA? (for me I need RV32E or RV32I)
  • How to adapt debugging toolchain integration like probe-rs and defmt?
  • How to specify which function is bootloader and my memory region(flash, ram, etc.)?
    As a newcomer to Rust embedded development, I've formed some hypotheses about these issues by reading through codebases, but I want to avoid making incorrect assumptions that might prevent me from adopting established best practices. I would be extremely grateful for any pointers to relevant documentation or existing resources that could help clarify these areas
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Curious question here: are you building your own SoC, based on a chip built using a RISC-V MCU? Or are you looking to implement for an existing SoC?

I'm not awfully knowledgeable regarding embedded technologies, but building an entire SoC, then creating drivers in Rust for them, and more, seems like it's more effort than it's worth, is it not? Is this for a fun project to do, or a practical use case?

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Actually, I’ve described a RISC-V CPU using Chisel and implemented a simple bus/peripheral system, which can be considered a rudimentary SoC. Previously, I tested it using C on FPGAs or in simulations. However, I’ve recently become interested in Rust for embedded systems, so I decided to try writing programs executable on it in Rust.

This isn’t a practical project but purely a passion-driven endeavor (as a student, I have the luxury of tinkering with random projects :grinning_face_with_smiling_eyes:). Fortunately, I’ve managed to make some progress. The Rust Embedded Book(Preface - The Embedonomicon)) is awesome – I’ve even successfully compiled a program following its guide (though it’s a tiny step!).
If you’re curious, my code is available here: (GitHub - CodeWenjiu/am-rs).

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Interesting!

I'll 100% personally keep track of this project.

Regarding memory mapping, etc, what you're after is the Peripheral Access Crate (PAC), which, for any chip (SoC, etc.), is best created by describing an .svd file, and then using svd2rust to convert it into a crate to access and manipulate it.

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